Driving principle of TFT LCD liquid crystal display part two

It is obvious that Cs on gate does not need to add an extra common trace like Cs on common, so its aperture ratio is relatively large. The size of the aperture ratio is an important factor affecting the brightness and design of the panel, so most current panel designs use the Cs on gate method. However, since the storage capacitor in the Cs on gate mode is formed between the next gate line and the display electrode (see the equivalent circuit of Cs on gate and Cs on common in Figure 2), the gate line is connected to The wiring on the gate end of each TFT is mainly used as a gate driver to send a signal to open the small TFT displays, so that the TFT can charge and discharge the display electrode. Therefore, when the next gate line sends voltage to turn on the next TFT, it will affect the amount of voltage stored on the storage capacitor. However, the time from opening to closing of the next gate line is very short (based on a panel with 1024 x 768 resolution and 60Hz update frequency). The opening time of a gate line is about 20μs, and the display screen update time is about 16ms. , so the impact is limited in comparison), so when the next gate line is closed and returns to the original voltage, the voltage of the Cs storage capacitor will also return to normal. This is why most storage capacitor designs use Cs on gate.